The present invention relates, in general, to integrated circuits and, more particularly, to memory circuits.
A portable wireless system such as a cellular phone or a pager uses analog and active circuitry to convert signals between frequencies ranging from radio frequency (RF) to voice band. Received RF signals are converted to base-band signals through circuits such as an RF transceiver, a down converter, and a demodulator. For a cellular phone the converted base-band signals are processed into recognizable speech in the voice band frequencies. A digital signal processor (DSP) uses data stored in a static random access memory (SRAM) and a FLASH memory to process the base-band signals.
The FLASH memory, such as an array of floating gate non-volatile memory cells, is used to store software program instructions used by the digital signal processor. The high density FLASH memory needs to be easily programmed or "written" and, as the occasion arises, to reprogram ("erase" and "rewrite") the device in the field. Associated with the memory array are page buffer latches that store data for programming multiple memory cells in a page programming mode. The page buffer latches allow an entire row of data for a FLASH memory to be simultaneously read.
The page buffer latch supplies a current to the memory cell in accordance with data that is stored in the latch. The smallest area for an integrated page buffer latch includes two inverters for latching the data. The output inverter is used to source the current onto a bit line that connects to the memory cell. The current can vary both with the processing parameters used in the fabrication of the memory circuit and with the operating supply voltage that powers the page buffer latch. Thus, a wide distribution in the value of the current is generated by the page buffer latch. The wide distribution can cause difficulties in the verification of the data programmed into the memory cells.
Accordingly, it would be advantageous to have a page buffer latch circuit that controls the distribution of the values for the current that is used in verification of the data that is programmed in the memory cells.